769 search results - page 105 / 154 » Timed Circuit Synthesis Using Implicit Methods |
FPGA
2010
ACM
14 years 4 months ago
2010
ACM
Monte Carlo based SSTA serves as the golden standard against alternative SSTA algorithms, but it is seldom used in practice due to its high computation time. In this paper, we acc...
ISCAS
2008
IEEE
14 years 2 months ago
2008
IEEE
— It is well known that significant power savings can be obtained by disabling or shutting down parts of a circuit during idle periods. One method is to use a high level partiti...
ICCS
2009
Springer
14 years 2 months ago
2009
Springer
Abstract. A framework for a fully implicit solution method is implemented into (1) the High Order Methods Modeling Environment (HOMME), which is a spectral element dynamical core o...
ICCD
2004
IEEE
14 years 4 months ago
2004
IEEE
Deterministic gate delay models have been widely used to find the transition probabilities at the nodes of a circuit for calculating the power dissipation. However, with progress...
ASPDAC
2006
ACM
14 years 1 months ago
2006
ACM
As technology scales down, timing verification of digital integrated circuits becomes an increasingly challenging task due to the gate and wire variability. Therefore, statistical...