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ECRTS
2002
IEEE
14 years 2 months ago
Scope-Tree: A Program Representation for Symbolic Worst-Case Execution Time Analysis
Most WCET analysis techniques only provide an upper bound on the worst case execution time as a constant value. However, it often appears that the execution time of a piece of cod...
Antoine Colin, Guillem Bernat
VTC
2008
IEEE
127views Communications» more  VTC 2008»
14 years 4 months ago
Convergence Analysis of Iteratively Detected Time Hopping and DS-CDMA Ultrawide Bandwidth Systems by EXIT Charts
— This paper presents a novel analysis on the decoding convergence of Time Hopping (TH) and Direct Sequence (DS) Code-Division Multiple-Access (CDMA) Ultrawide Bandwidth (UWB) sy...
Raja Ali Riaz, Mohammed El-Hajjar, Qasim Zeeshan A...
ICCAD
2000
IEEE
169views Hardware» more  ICCAD 2000»
14 years 2 months ago
Transistor-Level Timing Analysis Using Embedded Simulation
A high accuracy system for transistor-level static timing analysis is presented. Accurate static timing verification requires that individual gate and interconnect delays be accu...
Pawan Kulshreshtha, Robert Palermo, Mohammad Morta...
DOCENG
2006
ACM
14 years 4 months ago
Minimum sized text containment shapes
In many text-processing applications, we would like shapes that expand (or shrink) in size to fit their textual content. We address how to efficiently compute the minimum size fo...
Nathan Hurst, Kim Marriott, Peter Moulder
FSEN
2009
Springer
14 years 4 months ago
Modular Schedulability Analysis of Concurrent Objects in Creol
We present an automata theoretic framework for modular schedulability analysis of real time asynchronous objects modeled in the language Creol. In previous work we analyzed the sch...
Frank S. de Boer, Tom Chothia, Mohammad Mahdi Jagh...