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PPOPP
2010
ACM
14 years 7 months ago
Symbolic prefetching in transactional distributed shared memory
We present a static analysis for the automatic generation of symbolic prefetches in a transactional distributed shared memory. A symbolic prefetch specifies the first object to be...
Alokika Dash, Brian Demsky
IISWC
2006
IEEE
14 years 3 months ago
Modeling Cache Sharing on Chip Multiprocessor Architectures
— As CMPs are emerging as the dominant architecture for a wide range of platforms (from embedded systems and game consoles, to PCs, and to servers) the need to manage on-chip res...
Pavlos Petoumenos, Georgios Keramidas, Håkan...
ISCAS
2006
IEEE
157views Hardware» more  ISCAS 2006»
14 years 3 months ago
DCOS: cache embedded switch architecture for distributed shared memory multiprocessor SoCs
Abstract— Shared memory is a common inter-processor communication paradigm for on-chip multiprocessor SoC (MPSoC) platforms. The latency overhead of switch-based interconnection ...
Daewook Kim, Manho Kim, Gerald E. Sobelman
JSSPP
2000
Springer
14 years 1 months ago
Time-Sharing Parallel Jobs in the Presence of Multiple Resource Requirements
Abstract. Buffered coscheduling is a new methodology that can substantially increase resource utilization, improve response time, and simplify the development of the run-time suppo...
Fabrizio Petrini, Wu-chun Feng
HIPC
2004
Springer
14 years 3 months ago
A Shared Memory Dispatching Approach for Partially Clairvoyant Schedulers
It is well known that in a typical real-time system, certain parameters, such as the execution time of a job, are not fixed numbers. In such systems, it is common to characterize ...
K. Subramani, Kiran Yellajyosula