483 search results - page 77 / 97 » Timing Games and Shared Memory |
HCW
1999
IEEE
14 years 2 months ago
1999
IEEE
A major challenge in Metacomputing Systems (Computational Grids) is to effectively use their shared resources, such as compute cycles, memory, communication network, and data repo...
IPPS
1994
IEEE
14 years 2 months ago
1994
IEEE
A parallel transputer-based emulator has been developed to evaluate the DDM--ahighlyparallel virtual shared memory architecture. The emulator provides performance results of a har...
EWC
2000
13 years 9 months ago
2000
The goals of Design Rationale Capture (DRC) are improving design quality and reducing design time. These general goals have led to the design of many DRC techniques originating fro...
AI
1999
Springer
13 years 9 months ago
1999
Springer
Bucket elimination is an algorithmic framework that generalizes dynamic programming to accommodate many problem-solving and reasoning tasks. Algorithms such as directional-resolut...
EMSOFT
2010
Springer
13 years 7 months ago
2010
Springer
Abstract--Cyber-Physical Systems require distributed architectures to support safety critical real-time control. Kopetz' Time-Triggered Architectures (TTA) have been proposed ...