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ISQED
2002
IEEE
83views Hardware» more  ISQED 2002»
14 years 1 months ago
A Hybrid BIST Architecture and Its Optimization for SoC Testing
This paper presents a hybrid BIST architecture and methods for optimizing it to test systems-on-chip in a cost effective way. The proposed self-test architecture can be implemente...
Gert Jervan, Zebo Peng, Raimund Ubar, Helena Kruus
ACL
2006
13 years 10 months ago
An Effective Two-Stage Model for Exploiting Non-Local Dependencies in Named Entity Recognition
This paper shows that a simple two-stage approach to handle non-local dependencies in Named Entity Recognition (NER) can outperform existing approaches that handle non-local depen...
Vijay Krishnan, Christopher D. Manning
CDC
2009
IEEE
181views Control Systems» more  CDC 2009»
14 years 1 months ago
Stability of switched linear systems and the convergence of random products
— In this paper we give conditions that a discrete time switched linear systems must satisfy if it is stable. We do this by calculating the mean and covariance of the set of matr...
Ning Wang, Magnus Egerstedt, Clyde F. Martin
FPGA
1997
ACM
127views FPGA» more  FPGA 1997»
14 years 1 months ago
General Modeling and Technology-Mapping Technique for LUT-Based FPGAs
We present a general approach to the FPGA technology mapping problem that applies to any logic block composed of lookup tables LUTs and can yield optimal solutions. The connecti...
Amit Chowdhary, John P. Hayes
UAI
1996
13 years 10 months ago
Learning Equivalence Classes of Bayesian Network Structures
Two Bayesian-network structures are said to be equivalent if the set of distributions that can be represented with one of those structures is identical to the set of distributions...
David Maxwell Chickering