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» Timing analysis in high-level synthesis
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FMCAD
2000
Springer
13 years 11 months ago
SAT-Based Image Computation with Application in Reachability Analysis
Image computation nds wide application in VLSI CAD, such as state reachability analysis in formal veri cation and synthesis, combinational veri cation, combinational and sequential...
Aarti Gupta, Zijiang Yang, Pranav Ashar, Anubhav G...

Publication
295views
12 years 5 months ago
The Age of Analog Networks.
A large class of systems of biological and technological relevance can be described as analog networks, that is, collections of dynamic devices interconnected by links of varying s...
Claudio Mattiussi, Daniel Marbach, Peter Dürr, Da...
DATE
2008
IEEE
111views Hardware» more  DATE 2008»
14 years 2 months ago
Incremental Criticality and Yield Gradients
— Criticality and yield gradients are two crucial diagnostic metrics obtained from Statistical Static Timing Analysis (SSTA). They provide valuable information to guide timing op...
Jinjun Xiong, Vladimir Zolotov, Chandu Visweswaria...
TIC
2000
Springer
137views System Software» more  TIC 2000»
13 years 11 months ago
Scalable Certification for Typed Assembly Language
Abstract. A type-based certifying compiler maps source code to machine code and target-level type annotations. The target-level annotations make it possible to prove easily that th...
Dan Grossman, J. Gregory Morrisett
PLDI
2004
ACM
14 years 1 months ago
Symbolic pointer analysis revisited
Pointer analysis is a critical problem in optimizing compiler, parallelizing compiler, software engineering and most recently, hardware synthesis. While recent efforts have sugges...
Jianwen Zhu, Silvian Calman