3706 search results - page 38 / 742 » To Cache or Not To Cache |
124
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ISCA
2009
IEEE
15 years 9 months ago
2009
IEEE
Caching techniques have been an efficient mechanism for mitigating the effects of the processor-memory speed gap. Traditional multi-level SRAM-based cache hierarchies, especially...
151
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PE
2006
Springer
15 years 2 months ago
2006
Springer
In a multi-level cache such as those used for web caching, a hit at level l leads to the caching of the requested object in all intermediate caches on the reverse path (levels l -...
116
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SBACPAD
2004
IEEE
15 years 3 months ago
2004
IEEE
High-performance processors employ aggressive speculation and prefetching techniques to increase performance. Speculative memory references caused by these techniques sometimes br...
111
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ISCA
1994
IEEE
15 years 6 months ago
1994
IEEE
This paper presents an examination of different cache and processor configurations assuming transistor densities will continue to increase as they have in the past. While in the s...
117
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HPCA
2009
IEEE
16 years 3 months ago
2009
IEEE
In a Chip Multi-Processor (CMP) with private caches, the last level cache is statically partitioned between all the cores. This prevents such CMPs from sharing cache capacity in r...