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101
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HPCA
2008
IEEE
16 years 3 months ago
2008
IEEE
The interconnect mechanisms (shared bus or crossbar) used in current chip-multiprocessors (CMPs) are expected to become a bottleneck that prevents these architectures from scaling...
129
Voted
SIGMETRICS
2000
ACM
15 years 2 months ago
2000
ACM
Previous studies measuring the performance of general-purpose operating systems running large-scale Internet server applications, such as proxy caches, have identified design defi...
182
Voted
ISORC
2011
IEEE
14 years 6 months ago
2011
IEEE
—Static cache analysis for data allocated on the heap is practically impossible for standard data caches. We propose a distinct object cache for heap allocated data. The cache is...
143
Voted
ACSC
2004
IEEE
15 years 6 months ago
2004
IEEE
This paper presents a case study for automatic verification using the Communicating Sequential Processes formalism. The case study concerns the Futurebus+ cache coherency standard...
112
Voted
ASPLOS
1991
ACM
15 years 6 months ago
1991
ACM
Blocking is a well-known optimization technique for improving the effectiveness of memory hierarchies. Instead of operating on entire rows or columns of an array, blocked algorith...