Sciweavers

484 search results - page 23 / 97
» To Parallelize or Not to Parallelize, Speed Up Issue
Sort
View
CODES
2006
IEEE
14 years 2 months ago
Heterogeneous multiprocessor implementations for JPEG: : a case study
Heteregenous multiprocessor SoCs are becoming a reality, largely due to the abundance of transistors, intellectual property cores and powerful design tools. In this project, we ex...
Seng Lin Shee, Andrea Erdos, Sri Parameswaran
HPCA
2006
IEEE
14 years 8 months ago
Exploiting parallelism and structure to accelerate the simulation of chip multi-processors
Simulation is an important means of evaluating new microarchitectures. Current trends toward chip multiprocessors (CMPs) try the ability of designers to develop efficient simulato...
David A. Penry, Daniel Fay, David Hodgdon, Ryan We...
INFOCOM
2005
IEEE
14 years 2 months ago
TCAM-based distributed parallel packet classification algorithm with range-matching solution
Packet Classification (PC) has been a critical data path function for many emerging networking applications. An interesting approach is the use of TCAM to achieve deterministic, hi...
Kai Zheng, Hao Che, Zhijun Wang, Bin Liu
WSC
2004
13 years 9 months ago
Towards Adaptive Caching for Parallel and Discrete Event Simulation
We investigate factors that impact the effectiveness of caching to speed up discrete event simulation. Walsh and Sirer have shown that a variant of function caching (staged simula...
Abhishek Chugh, Maria Hybinette
HPDC
2010
IEEE
13 years 9 months ago
Optimization of a parallel permutation testing function for the SPRINT R package
The statistical language R and Bioconductor package are favoured by many biostatisticians for processing microarray data. The amount of data produced by these analyses has reached...
Savvas Petrou, Terence M. Sloan, Muriel Mewissen, ...