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» Tool Presentation: Teaching Concurrency and Model Checking
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ICCAD
2002
IEEE
176views Hardware» more  ICCAD 2002»
14 years 5 months ago
High capacity and automatic functional extraction tool for industrial VLSI circuit designs
In this paper we present an advanced functional extraction tool for automatic generation of high-level RTL from switch-level circuit netlist representation. The tool is called FEV...
Sasha Novakovsky, Shy Shyman, Ziyad Hanna
ICALP
2007
Springer
14 years 2 months ago
Co-Logic Programming: Extending Logic Programming with Coinduction
In this paper we present the theory and practice of co-logic programming (co-LP for brevity), a paradigm that combines both inductive and coinductive logic programming. Co-LP is a ...
Luke Simon, Ajay Bansal, Ajay Mallya, Gopal Gupta
FASE
2004
Springer
14 years 2 months ago
Checking Absence of Illicit Applet Interactions: A Case Study
Abstract. This paper presents the use of a method – and its corresponding tool set – for compositional verification of applet interactions on a realistic industrial smart card...
Marieke Huisman, Dilian Gurov, Christoph Sprenger,...
ENTCS
2007
101views more  ENTCS 2007»
13 years 8 months ago
A Framework for Timed Concurrent Constraint Programming with External Functions
The timed concurrent constraint programming language (tccp in short) was introduced for modeling reactive systems. This language allows one to model in a very intuitive way typica...
María Alpuente, Bernhard Gramlich, Alicia V...
SAC
2008
ACM
13 years 7 months ago
ICER: a tool for finding errors in a UML model
Detecting errors in an early phase of software development can help to reduce the cost of software systems. Many research attempts presented a fixed set of rules to help finding e...
Wuwei Shen, Dae-Kyoo Kim