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MSS
2003
IEEE
113views Hardware» more  MSS 2003»
14 years 29 days ago
Design and Implementation of Multiple Addresses Parallel Transmission Architecture for Storage Area Network
In this paper, we present a parallel transmission architecture for SAN. By using two schedulers on the destination and source addresses of packets, the load of multiple data flows...
Bin Meng, Patrick B. T. Khoo, T. C. Chong
DAC
1994
ACM
13 years 11 months ago
ASTRX/OBLX: Tools for Rapid Synthesis of High-Performance Analog Circuits
We describe ASTRX/OBLX, a synthesis system that can size high-performance analog circuit topologies to meet usersupplied linear performance specifications without designer-supplied...
Emil S. Ochotta, Rob A. Rutenbar, L. Richard Carle...
DSOM
2006
Springer
13 years 11 months ago
Reconfiguring Self-stabilizing Publish/Subscribe Systems
Recent work on self-stabilizing routing in publish/subscribe systems showed that it is feasible to automate reconfigurations in case of faults by enabling the system to recover fro...
Michael A. Jaeger, Gero Mühl, Matthias Werner...
ESANN
2007
13 years 9 months ago
A supervised learning approach based on STDP and polychronization in spiking neuron networks
We propose a network model of spiking neurons, without preimposed topology and driven by STDP (Spike-Time-Dependent Plasticity), a temporal Hebbian unsupervised learning mode, biol...
Hélène Paugam-Moisy, Régis Ma...
PRL
1998
152views more  PRL 1998»
13 years 7 months ago
A 3D 6-subiteration thinning algorithm for extracting medial lines
Thinning is a frequently used method for extracting skeletons in discrete spaces. This paper presents an efficient parallel Žthinning algorithm that directly extracts medial line...
Kálmán Palágyi, Attila Kuba