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FPL
2004
Springer
144views Hardware» more  FPL 2004»
13 years 11 months ago
A Methodology for Energy Efficient FPGA Designs Using Malleable Algorithms
A recent trend towards integrating FPGAs with many heterogeneous components, such as memory systems, dedicated multipliers, etc., has made them an attractive option for implementin...
Jingzhao Ou, Viktor K. Prasanna
MOBISYS
2010
ACM
13 years 10 months ago
Anatomizing application performance differences on smartphones
The use of cellular data networks is increasingly popular due to the widespread deployment of 3G technologies and the rapid adoption of smartphones, such as iPhone and GPhone. Bes...
Junxian Huang, Qiang Xu, Birjodh Tiwana, Zhuoqing ...
OSDI
1994
ACM
13 years 9 months ago
Performance Issues in Parallelized Network Protocols
Parallel processing has been proposed as a means of improving network protocol throughput. Several different strategies have been taken towards parallelizing protocols. A relative...
Erich M. Nahum, David J. Yates, James F. Kurose, D...
SIGMETRICS
2002
ACM
13 years 7 months ago
Full-system timing-first simulation
Computer system designers often evaluate future design alternatives with detailed simulators that strive for functional fidelity (to execute relevant workloads) and performance fi...
Carl J. Mauer, Mark D. Hill, David A. Wood
PIMRC
2010
IEEE
13 years 5 months ago
An implementation of Cognitive Resource Management on LTE platform
Abstract--In this paper we describe an LTE based demonstrator of the Universal Link Layer API (ULLA) and Cognitive Resource Manager (CRM) modules that are developed in ARAGORN proj...
Tao Cai, Georgios P. Koudouridis, Johan Johansson,...