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» Towards Integrated Verification of Timed Transition Models
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ASPDAC
2001
ACM
126views Hardware» more  ASPDAC 2001»
13 years 10 months ago
A new partitioning scheme for improvement of image computation
Abstract-- Image computation is the core operation for optimization and formal verification of sequential systems like controllers or protocols. State exploration techniques based ...
Christoph Meinel, Christian Stangier
JLP
2008
98views more  JLP 2008»
13 years 6 months ago
Comparing disjunctive modal transition systems with an one-selecting variant
models, used for specification, analysis and verification, usually describe sets of implementations by means of a refinement relation. In the branching time setting, implementatio...
Harald Fecher, Heiko Schmidt
RSA
2006
144views more  RSA 2006»
13 years 6 months ago
Data structures with dynamical random transitions
We present a (non-standard) probabilistic analysis of dynamic data structures whose sizes are considered as dynamic random walks. The basic operations (insertion, deletion, positi...
Clément Dombry, Nadine Guillotin-Plantard, ...
DAC
1999
ACM
13 years 11 months ago
Cycle and Phase Accurate DSP Modeling and Integration for HW/SW Co-Verification
We present our practical experience in the modeling and integration of cycle/phase-accurate instruction set architecture (ISA) models of digital signal processors (DSPs) with othe...
Lisa M. Guerra, Joachim Fitzner, Dipankar Talukdar...
CORR
2010
Springer
176views Education» more  CORR 2010»
13 years 6 months ago
Bus Protocols: MSC-Based Specifications and Translation into Program of Verification Tool for Formal Verification
Message Sequence Charts (MSCs) are an appealing visual formalism mainly used in the early stages of system design to capture the system requirements. However, if we move towards a...
Kamrul Hasan Talukder