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ECRTS
2000
IEEE
15 years 8 months ago
Towards validated real-time software
We present a tool for the design and validation of embedded real-time applications. The tool integrates two approaches, the use of the synchronous programming language ESTEREL for...
Valérie Bertin, Michel Poize, Jacques Pulou...
DAC
2003
ACM
16 years 4 months ago
Design flow for HW / SW acceleration transparency in the thumbpod secure embedded system
This paper describes a case study and design flow of a secure embedded system called ThumbPod, which uses cryptographic and biometric signal processing acceleration. It presents t...
David Hwang, Bo-Cheng Lai, Patrick Schaumont, Kazu...
135
Voted
EURODAC
1995
IEEE
131views VHDL» more  EURODAC 1995»
15 years 7 months ago
System level design, a VHDL based approach
A hierarchical system design flow was developed to facilitate concurrent development and Time-to-Market reductions. The system design flow provides for codesign of (embedded) driv...
Joris van den Hurk, Edwin Dilling
128
Voted
FPL
2004
Springer
114views Hardware» more  FPL 2004»
15 years 9 months ago
Artificial Neural Networks Processor - A Hardware Implementation Using a FPGA
Several implementations of Artificial Neural Networks have been reported in scientific papers. Nevertheless, these implementations do not allow the direct use of off-line trained n...
Pedro Ferreira, Pedro Ribeiro, Ana Antunes, Fernan...
128
Voted
IJCNN
2000
IEEE
15 years 8 months ago
Analog Hardware Implementation of the Random Neural Network Model
This paper presents a simple continuous analog hardware realization of the Random Neural Network (RNN) model. The proposed circuit uses the general principles resulting from the u...
Hossam Abdelbaki, Erol Gelenbe, Said E. El-Khamy