Sciweavers

513 search results - page 22 / 103
» Towards a Model for Hardware and Software Functional Partiti...
Sort
View
HPCA
2002
IEEE
14 years 8 months ago
A New Memory Monitoring Scheme for Memory-Aware Scheduling and Partitioning
We propose a low overhead, on-line memory monitoring scheme utilizing a set of novel hardware counters. The counters act like pressure gauges indicating the marginal gain in the n...
G. Edward Suh, Srinivas Devadas, Larry Rudolph
ASPDAC
2001
ACM
105views Hardware» more  ASPDAC 2001»
14 years 3 days ago
Toward better wireload models in the presence of obstacles
Wirelength estimation techniques typically contain a site density function that enumerates all possible path sites for each wirelength in an architecture and an occupation probabil...
Chung-Kuan Cheng, Andrew B. Kahng, Bao Liu, Dirk S...
ECMDAFA
2006
Springer
137views Hardware» more  ECMDAFA 2006»
14 years 3 days ago
Harvesting Software Systems for MDA-Based Reengineering
Abstract. In this paper we report on a feasibility study in reengineering legacy systems towards a model-driven architecture (MDA). Steps in our approach consist of (1) parsing the...
Thijs Reus, Hans Geers, Arie van Deursen
HOST
2011
IEEE
12 years 8 months ago
Enhancing security via provably trustworthy hardware intellectual property
—We introduce a novel hardware intellectual property acquisition protocol, show how it can support the transfer of provably trustworthy modules between hardware IP producers and ...
Eric Love, Yier Jin, Yiorgos Makris
ASWSD
2004
Springer
14 years 1 months ago
Simulink Integration of Giotto/TDL
The paper first presents the integration options of what we call the Timing Description Language (TDL) with MathWorks' Simulink tools. Based on the paradigm of logical executi...
Wolfgang Pree, Gerald Stieglbauer, Josef Templ