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SASP
2008
IEEE
140views Hardware» more  SASP 2008»
14 years 1 months ago
An FPGA Design Space Exploration Tool for Matrix Inversion Architectures
— Matrix inversion is a common function found in many algorithms used in wireless communication systems. As FPGAs become an increasingly attractive platform for wireless communic...
Ali Irturk, Bridget Benson, Shahnam Mirzaei, Ryan ...
SAMOS
2005
Springer
14 years 28 days ago
Automatic ADL-Based Assembler Generation for ASIP Programming Support
Abstract. Systems-on-Chip (SoCs) may be built upon general purpose CPUs or application-specific instruction-set processors (ASIPs). On the one hand, ASIPs allow a tradeoff betwee...
Leonardo Taglietti, José O. Carlomagno Filh...
ISSTA
2006
ACM
14 years 1 months ago
Towards supporting the architecture design process through evaluation of design alternatives
This paper addresses issues involved when an architect explore alternative designs including non-functional requirements; in our approach, non-functional requirements are expresse...
Lihua Xu, Scott A. Hendrickson, Eric Hettwer, Hada...
ITC
2003
IEEE
327views Hardware» more  ITC 2003»
14 years 21 days ago
Case Study - Using STIL as Test Pattern Language
This paper describes the implementation of a test pattern language using STIL [1], the IEEE Standard Test Interface Language (1450-1999), in a next generation, open architecture A...
Daniel Fan, Steve Roehling, Rusty Carruth
MASCOTS
2010
13 years 9 months ago
Barra: A Parallel Functional Simulator for GPGPU
Abstract--We present Barra, a simulator of Graphics Processing Units (GPU) tuned for general purpose processing (GPGPU). It is based on the UNISIM framework and it simulates the na...
Sylvain Collange, Marc Daumas, David Defour, David...