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ICCD
2006
IEEE
103views Hardware» more  ICCD 2006»
14 years 4 months ago
Requirements and Concepts for Transaction Level Assertions
— The latest development of hardware design and ation methodologies shows a trend towards abstraction levels higher than RTL, referred to as transaction level (TL). Transaction l...
Wolfgang Ecker, Volkan Esen, Michael Hull, Thomas ...
CC
2010
Springer
190views System Software» more  CC 2010»
14 years 1 months ago
Is Reuse Distance Applicable to Data Locality Analysis on Chip Multiprocessors?
On Chip Multiprocessors (CMP), it is common that multiple cores share certain levels of cache. The sharing increases the contention in cache and memory-to-chip bandwidth, further h...
Yunlian Jiang, Eddy Z. Zhang, Kai Tian, Xipeng She...
EMSOFT
2009
Springer
14 years 1 months ago
Probabilistic modeling of data cache behavior
In this paper, we propose a formal analysis approach to estimate the expected (average) data cache access time of an application across all possible program inputs. Towards this g...
Vinayak Puranik, Tulika Mitra, Y. N. Srikant
CVPR
2010
IEEE
14 years 3 months ago
Toward Coherent Object Detection And Scene Layout Understanding
Detecting objects in complex scenes while recovering the scene layout is a critical functionality in many vision-based applications. Inspired by the work of [18], we advocate the ...
Yingze Bao, Min Sun, Silvio Savarese
BRAIN
2010
Springer
13 years 8 months ago
Cognitive Informatics and Denotational Mathematical Means for Brain Informatics
Cognitive informatics studies the natural intelligence and the brain from a theoretical and a computational approach, which rigorously explains the ms of the brain by a fundamental...
Yingxu Wang