Sciweavers

1017 search results - page 162 / 204
» Towards an Active Network Architecture
Sort
View
PDP
2010
IEEE
13 years 12 months ago
Energy-Efficient Hardware Prefetching for CMPs Using Heterogeneous Interconnects
In the last years high performance processor designs have evolved toward Chip-Multiprocessor (CMP) architectures that implement multiple processing cores on a single die. As the nu...
Antonio Flores, Juan L. Aragón, Manuel E. A...
ICDE
2007
IEEE
137views Database» more  ICDE 2007»
14 years 9 months ago
PASS Middleware for Distributed and Autonomous XML Message Processing
Basic message processing tasks, such as wellformedness checking and grammar validation, can be off-loaded from the service providers' own infrastructures. To enable effective...
Dirceu Cavendish, K. Selçuk Candan
SDL
2007
192views Hardware» more  SDL 2007»
13 years 9 months ago
OpenComRTOS: An Ultra-Small Network Centric Embedded RTOS Designed Using Formal Modeling
Abstract. OpenComRTOS is one of the few Real-Time Operating Systems (RTOS) for embedded systems that was developed using formal modeling techniques. The goal was to obtain a proven...
Eric Verhulst, Gjalt G. de Jong
MOBIDE
2005
ACM
14 years 1 months ago
Recovery of mobile internet transactions: algorithm, implementation and analysis
The increasing popularity of mobile devices and the support of web portals towards performing transactions from these mobile devices has enabled business on the move. However, int...
Shashi Anand, Krithi Ramamritham
NN
2006
Springer
100views Neural Networks» more  NN 2006»
13 years 7 months ago
Perceiving the unusual: Temporal properties of hierarchical motor representations for action perception
Recent computational approaches to action imitation have advocated the use of hierarchical representations in the perception and imitation of demonstrated actions. Hierarchical re...
Yiannis Demiris, Gavin Simmons