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ESTIMEDIA
2007
Springer
13 years 11 months ago
Still Image Processing on Coarse-Grained Reconfigurable Array Architectures
Due to the increasing demands on efficiency, performance and flexibility reconfigurable computational architectures are very promising candidates in embedded systems design. Recent...
Matthias Hartmann, Vasileios (Vassilis) Pantazis, ...
ISCAS
2005
IEEE
129views Hardware» more  ISCAS 2005»
14 years 29 days ago
A reconfigurable architecture for scanning biosequence databases
—Unknown protein sequences are often compared to a set of known sequences (a database scan) to detect functional similarities. Even though efficient dynamic programming algorithm...
Timothy F. Oliver, Bertil Schmidt, Douglas L. Mask...
PACS
2000
Springer
99views Hardware» more  PACS 2000»
13 years 11 months ago
Dynamically Reconfiguring Processor Resources to Reduce Power Consumption in High-Performance Processors
Power dissipation is a major concern not only for portable systems, but also for high-performance systems. In the past, energy consumption and processor heating was reduced mainly...
Roberto Maro, Yu Bai, R. Iris Bahar
ESTIMEDIA
2004
Springer
13 years 11 months ago
Adaptive spectrum-based variable bit truncation of discrete cosine transform (DCT) for energy-efficient wireless multimedia comm
This paper presents a new adaptive scheme to reduce the computation energy of the discrete cosine transform (DCT) architecture for image/video coding. The scheme employs the noise ...
Feng Liu, Chi-Ying Tsui
VLSID
2003
IEEE
92views VLSI» more  VLSID 2003»
14 years 7 months ago
Energy Efficient Scheduling for Datapath Synthesis
In this paper, we describe two new algorithms for datapath scheduling which aim at energy reduction while maintaining performance. The proposed algorithms, time constrained and re...
Saraju P. Mohanty, N. Ranganathan