Sciweavers

298 search results - page 14 / 60
» Towards experimental evaluation of code obfuscation techniqu...
Sort
View
ISLPED
1999
ACM
150views Hardware» more  ISLPED 1999»
14 years 27 days ago
Using dynamic cache management techniques to reduce energy in a high-performance processor
In this paper, we propose a technique that uses an additional mini cache, the L0-Cache, located between the instruction cache I-Cache and the CPU core. This mechanism can provid...
Nikolaos Bellas, Ibrahim N. Hajj, Constantine D. P...
CCS
2009
ACM
14 years 3 months ago
Behavior based software theft detection
Along with the burst of open source projects, software theft (or plagiarism) has become a very serious threat to the healthiness of software industry. Software birthmark, which re...
Xinran Wang, Yoon-chan Jhi, Sencun Zhu, Peng Liu
DAC
1997
ACM
14 years 23 days ago
Analysis and Evaluation of Address Arithmetic Capabilities in Custom DSP Architectures
—Many application-specific architectures provide indirect addressing modes with auto-increment/decrement arithmetic. Since these architectures generally do not feature an indexe...
Ashok Sudarsanam, Stan Y. Liao, Srinivas Devadas
NSDI
2004
13 years 10 months ago
MACEDON: Methodology for Automatically Creating, Evaluating, and Designing Overlay Networks
Currently, researchers designing and implementing largescale overlay services employ disparate techniques at each stage in the production cycle: design, implementation, experiment...
Adolfo Rodriguez, Charles Edwin Killian, Sooraj Bh...
LCTRTS
2007
Springer
14 years 2 months ago
Tetris: a new register pressure control technique for VLIW processors
The run-time performance of VLIW (very long instruction word) microprocessors depends heavily on the effectiveness of its associated optimizing compiler. Typical VLIW compiler pha...
Weifeng Xu, Russell Tessier