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ICPP
2002
IEEE
14 years 1 months ago
Out-of-Order Instruction Fetch Using Multiple Sequencers
Conventional instruction fetch mechanisms fetch contiguous blocks of instructions in each cycle. They are difficult to scale since taken branches make it hard to increase the siz...
Paramjit S. Oberoi, Gurindar S. Sohi
PLDI
2011
ACM
12 years 11 months ago
Safe optimisations for shared-memory concurrent programs
Current proposals for concurrent shared-memory languages, including C++ and C, provide sequential consistency only for programs without data races (the DRF guarantee). While the i...
Jaroslav Sevcík
JUCS
2000
120views more  JUCS 2000»
13 years 8 months ago
Execution and Cache Performance of the Scheduled Dataflow Architecture
: This paper presents an evaluation of our Scheduled Dataflow (SDF) Processor. Recent focus in the field of new processor architectures is mainly on VLIW (e.g. IA-64), superscalar ...
Krishna M. Kavi, Joseph Arul, Roberto Giorgi
GPC
2008
Springer
13 years 9 months ago
Using Moldability to Improve Scheduling Performance of Parallel Jobs on Computational Grid
In a computational grid environment, a common practice is try to allocate an entire parallel job onto a single participating site. Sometimes a parallel job, upon its submission, ca...
Kuo-Chan Huang, Po-Chi Shih, Yeh-Ching Chung
IPPS
2009
IEEE
14 years 3 months ago
Guiding performance tuning for grid schedules
Grid jobs often consist of a large number of tasks. If the performance of a statically scheduled grid job is unsatisfactory, one must decide which code of which task should be imp...
Jörg Keller, Wolfram Schiffmann