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JSS
2006
104views more  JSS 2006»
13 years 8 months ago
Modelling and simulation of off-chip communication architectures for high-speed packet processors
In this work, we propose a visual, custom-designed, event-driven interconnect simulation framework to evaluate the performance of off-chip multi-processor/memory communications ar...
Jacob Engel, Daniel Lacks, Taskin Koçak
IPPS
2007
IEEE
14 years 3 months ago
Reconfigurable Architecture for Biological Sequence Comparison in Reduced Memory Space
DNA sequence alignment is a very important problem in bioinformatics. The algorithm proposed by Smith-Waterman (SW) is an exact method that obtains optimal local alignments in qua...
Azzedine Boukerche, Jan Mendonca Correa, Alba Cris...
WWW
2010
ACM
14 years 3 months ago
A client-server architecture for state-dependent dynamic visualizations on the web
As sophisticated enterprise applications move to the Web, some advanced user experiences become difficult to migrate due to prohibitively high computation, memory, and bandwidth r...
Daniel Coffman, Danny Soroker, Chandra Narayanaswa...
SIPS
2007
IEEE
14 years 3 months ago
Sphere Decoding for Multiprocessor Architectures
Motivated by the need for high throughput sphere decoding for multipleinput-multiple-output (MIMO) communication systems, we propose a parallel depth-first sphere decoding (PDSD)...
Qi Qi, Chaitali Chakrabarti
AVI
2010
13 years 10 months ago
An architecture and a visual interface for tagging the 3D web
Content classification performed by end users is spreading through the web. Most of the work done so far is related to the hypermedia web. In spite of that, there is a growing mas...
Fabio Pittarello