639 search results - page 6 / 128 » Tradeoffs in designing accelerator architectures for visual ... |
CGO
2007
IEEE
14 years 3 months ago
2007
IEEE
The demand for high performance has driven acyclic computation accelerators into extensive use in modern embedded and desktop architectures. Accelerators that are ideal from a sof...
WCAE
2006
ACM
14 years 2 months ago
2006
ACM
Two of the most important design issues for modern processors are power and performance. It is important for students in computer organization classes to understand the tradeoff b...
FPL
2009
Springer
14 years 1 months ago
2009
Springer
Spatially-tiled architectures, such as Coarse-Grained Reconfigurable Arrays (CGRAs), are powerful architectures for accelerating applications in the digital-signal processing, em...
HPCA
2009
IEEE
14 years 9 months ago
2009
IEEE
Heterogeneous multicores, such as Cell BE processors and GPGPUs, typically do not have caches for their accelerator cores because coherence traffic, cache misses, and latencies fr...
DAC
2005
ACM
14 years 10 months ago
2005
ACM
Device and interconnect fabrics at the nanoscale will have a density of defects and susceptibility to transient faults far exceeding those of current silicon technologies. In this...