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IOLTS
2006
IEEE
103views Hardware» more  IOLTS 2006»
14 years 1 months ago
Designing Robust Checkers in the Presence of Massive Timing Errors
So far, performance and reliability of circuits have been determined by worst-case characterization of silicon and environmental noise. As new deep sub-micron technologies exacerb...
Frederic Worm, Patrick Thiran, Paolo Ienne
ICIP
2003
IEEE
14 years 9 months ago
Smoothing B-spline active contour for fast and robust image and video segmentation
This paper deals with fast image and video segmentation using active contours. Region based active contours using level-sets are powerful techniques for video segmentation but the...
Frédéric Precioso, Michel Barlaud, T...
ICS
2009
Tsinghua U.
14 years 2 months ago
Adagio: making DVS practical for complex HPC applications
Power and energy are first-order design constraints in high performance computing. Current research using dynamic voltage scaling (DVS) relies on trading increased execution time...
Barry Rountree, David K. Lowenthal, Bronis R. de S...
IPPS
2007
IEEE
14 years 2 months ago
Improving Data Access Performance with Server Push Architecture
Data prefetching, where data is fetched before CPU demands for it, has been considered as an effective solution to mask data access latency. However, the current client-initiated ...
Xian-He Sun, Surendra Byna, Yong Chen
CVPR
2008
IEEE
14 years 10 months ago
FusionFlow: Discrete-continuous optimization for optical flow estimation
Accurate estimation of optical flow is a challenging task, which often requires addressing difficult energy optimization problems. To solve them, most top-performing methods rely ...
Victor S. Lempitsky, Stefan Roth, Carsten Rother