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GLVLSI
2008
IEEE
197views VLSI» more  GLVLSI 2008»
13 years 9 months ago
Efficient tree topology for FPGA interconnect network
This paper presents an improved Tree-based architecture that unifies two unidirectional programmable networks: A predictible downward network based on the Butterfly-FatTree topolo...
Zied Marrakchi, Hayder Mrabet, Emna Amouri, Habib ...
NIPS
2000
13 years 10 months ago
A Neural Probabilistic Language Model
A goal of statistical language modeling is to learn the joint probability function of sequences of words in a language. This is intrinsically difficult because of the curse of dim...
Yoshua Bengio, Réjean Ducharme, Pascal Vinc...
SIGCOMM
2004
ACM
14 years 2 months ago
Work-conserving distributed schedulers for Terabit routers
−Buffered multistage interconnection networks offer one of the most scalable and cost-effective approaches to building high capacity routers. Unfortunately, the performance of su...
Prashanth Pappu, Jonathan S. Turner, Kenneth Wong
JSAC
2006
199views more  JSAC 2006»
13 years 9 months ago
IDES: An Internet Distance Estimation Service for Large Networks
The responsiveness of networked applications is limited by communications delays, making network distance an important parameter in optimizing the choice of communications peers. S...
Yun Mao, Lawrence K. Saul, Jonathan M. Smith
NIPS
2008
13 years 10 months ago
On Computational Power and the Order-Chaos Phase Transition in Reservoir Computing
Randomly connected recurrent neural circuits have proven to be very powerful models for online computations when a trained memoryless readout function is appended. Such Reservoir ...
Benjamin Schrauwen, Lars Buesing, Robert A. Legens...