We propose a methodology for applying gate-level logic transformations to optimize power in digital circuits. Statistically simulated[14] switching information, gate delays, signa...
An exclusive-OR transform of input variables significantly reduces the size of the PLA implementation for adder and comparator circuits. For n bit adder circuits, the size of PLA ...
James Jacob, P. Srinivas Sivakumar, Vishwani D. Ag...
Graph transformation (GT) is being increasingly used in Model Driven Engineering (MDE) to describe in-place transformations like animations and refactorings. For its practical use,...
This paper describes newly invented multiscale transforms known under the name of the ridgelet [6] and the curvelet transforms [9, 8]. These systems combine ideas of multiscale an...
During built-in self-test (BIST), the set of patterns generated by a pseudo-random pattern generator may not provide a sufficiently high fault coverage. This paper presents a new ...