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DAC
1995
ACM
13 years 11 months ago
Rephasing: A Transformation Technique for the Manipulation of Timing Constraints
- We introduce a transformation, named rephasing, that manipulates the timing parameters in control-dataflow graphs. Traditionally high-level synthesis systems for DSP have either ...
Miodrag Potkonjak, Mani B. Srivastava
EURODAC
1995
IEEE
126views VHDL» more  EURODAC 1995»
13 years 11 months ago
Timing optimization by bit-level arithmetic transformations
This paper describes a method to optimize the performance of data paths. It is based on bit-level arithmetic transformations, and is especially suited to optimize large adder stru...
Luc Rijnders, Zohair Sahraoui, Paul Six, Hugo De M...
ASPDAC
2005
ACM
132views Hardware» more  ASPDAC 2005»
13 years 9 months ago
Automatic synthesis and scheduling of multirate DSP algorithms
- To date, most high-level synthesis systems do not automatically solve present design problems, such as those related to timing associated with the physical implementation of mult...
Ying Yi, Mark Milward, Sami Khawam, Ioannis Nousia...
DATE
2009
IEEE
112views Hardware» more  DATE 2009»
14 years 2 months ago
Algebraic techniques to enhance common sub-expression elimination for polynomial system synthesis
: Common sub-expression elimination (CSE) serves as a useful optimization technique in the synthesis of arithmetic datapaths described at RTL. However, CSE has a limited potential ...
Sivaram Gopalakrishnan, Priyank Kalla
MLMI
2004
Springer
14 years 1 months ago
A Mixed-Lingual Phonological Component Which Drives the Statistical Prosody Control of a Polyglot TTS Synthesis System
A polyglot text-to-speech synthesis system which is able to read aloud mixed-lingual text has first of all to derive the correct pronunciation. This is achieved with an accurate m...
Harald Romsdorfer, Beat Pfister, René Beutl...