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» Transformational Placement and Synthesis
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ICS
2009
Tsinghua U.
14 years 2 months ago
High-performance CUDA kernel execution on FPGAs
In this work, we propose a new FPGA design flow that combines the CUDA programming model from Nvidia with the state of the art high-level synthesis tool AutoPilot from AutoESL, to...
Alexandros Papakonstantinou, Karthik Gururaj, John...
SASP
2008
IEEE
183views Hardware» more  SASP 2008»
14 years 2 months ago
Application Acceleration with the Explicitly Parallel Operations System - the EPOS Processor
Different approaches have been proposed over the years for automatically transforming High-Level-Languages (HLL) descriptions of applications into custom hardware implementations. ...
Alexandros Papakonstantinou, Deming Chen, Wen-mei ...
INFOCOM
2008
IEEE
14 years 2 months ago
SRLG Failure Localization in All-Optical Networks Using Monitoring Cycles and Paths
—We introduce the concepts of monitoring paths (MPs) and monitoring cycles (MCs) for unique localization of shared risk linked group (SRLG) failures in all-optical networks. An S...
Satyajeet Ahuja, Srinivasan Ramasubramanian, Marwa...
ASPDAC
2006
ACM
119views Hardware» more  ASPDAC 2006»
14 years 1 months ago
Using speculative computation and parallelizing techniques to improve scheduling of control based designs
Recent research results have seen the application of parallelizing techniques to high-level synthesis. In particular, the effect of speculative code transformations on mixed contr...
Roberto Cordone, Fabrizio Ferrandi, Marco D. Santa...
LOPSTR
2001
Springer
14 years 4 days ago
On Deforesting Parameters of Accumulating Maps
Abstract. Deforestation is a well-known program transformation technique which eliminates intermediate data structures that are passed between functions. One of its weaknesses is t...
Kazuhiko Kakehi, Robert Glück, Yoshihiko Futa...