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ITC
1989
IEEE
82views Hardware» more  ITC 1989»
13 years 11 months ago
CMOS IC Stuck-Open Fault Electrical Effects and Design Considerations
- The electrical effects of CMOS IC physical defects that caused stuck-openfaults are evaluated, including their voltage levels, quiescent power supply current (IDDQ), transient re...
Jerry M. Soden, R. Keith Treece, Michael R. Taylor...
ICCD
2007
IEEE
125views Hardware» more  ICCD 2007»
14 years 4 months ago
Low-cost run-time diagnosis of hard delay faults in the functional units of a microprocessor
This paper addresses the run-time diagnosis of delay faults in functional units of microprocessors. Despite the popularity of the stuck-at fault model, it is no longer the only re...
Sule Ozev, Daniel J. Sorin, Mahmut Yilmaz
DSN
2005
IEEE
14 years 1 months ago
Design Time Reliability Analysis of Distributed Fault Tolerance Algorithms
Designing a distributed fault tolerance algorithm requires careful analysis of both fault models and diagnosis strategies. A system will fail if there are too many active faults, ...
Elizabeth Latronico, Philip Koopman
DFT
2004
IEEE
174views VLSI» more  DFT 2004»
13 years 11 months ago
Defect Avoidance in a 3-D Heterogeneous Sensor
A 3D Heterogeneous Sensor using a stacked chip is investigated. Optical Active Pixel Sensor and IR Bolometer detectors are combined to create a multispectral pixel for aligned col...
Glenn H. Chapman, Vijay K. Jain, Shekhar Bhansali