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DFT
2006
IEEE
74views VLSI» more  DFT 2006»
14 years 1 months ago
Recovery Mechanisms for Dual Core Architectures
Dual core architectures are commonly used to establish fault tolerance on the node level. Since comparison is usually performed for the outputs only, no precise diagnostic informa...
Christian El Salloum, Andreas Steininger, Peter Tu...
ISLPED
2005
ACM
136views Hardware» more  ISLPED 2005»
14 years 1 months ago
Energy efficient SEU-tolerance in DVS-enabled real-time systems through information redundancy
Concerns about the reliability of real-time embedded systems that employ dynamic voltage scaling has recently been highlighted [1,2,3], focusing on transient-fault-tolerance techn...
Alireza Ejlali, Marcus T. Schmitz, Bashir M. Al-Ha...
ISPA
2004
Springer
14 years 26 days ago
Highly Reliable Linux HPC Clusters: Self-Awareness Approach
Abstract. Current solutions for fault-tolerance in HPC systems focus on dealing with the result of a failure. However, most are unable to handle runtime system configuration change...
Chokchai Leangsuksun, Tong Liu, Yudan Liu, Stephen...
IOLTS
2002
IEEE
148views Hardware» more  IOLTS 2002»
14 years 13 days ago
Active Replication: Towards a Truly SRAM-Based FPGA On-Line Concurrent Testing
The reusing of the same hardware resources to implement speed-critical algorithms, without interrupting system operation, is one of the main reasons for the increasing use of reco...
Manuel G. Gericota, Gustavo R. Alves, Miguel L. Si...
ISCA
2002
IEEE
128views Hardware» more  ISCA 2002»
14 years 13 days ago
Detailed Design and Evaluation of Redundant Multithreading Alternatives
Exponential growth in the number of on-chip transistors, coupled with reductions in voltage levels, makes each generation of microprocessors increasingly vulnerable to transient f...
Shubhendu S. Mukherjee, Michael Kontz, Steven K. R...