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MASCOTS
2010
13 years 9 months ago
PUD-LRU: An Erase-Efficient Write Buffer Management Algorithm for Flash Memory SSD
Flash memory SSDs pose a well-known challenge, that is, the erase-before-write problem. Researchers try to solve this inherent problem from two different angles by either designing...
Jian Hu, Hong Jiang, Lei Tian, Lei Xu
MICRO
2010
IEEE
210views Hardware» more  MICRO 2010»
13 years 5 months ago
Thread Cluster Memory Scheduling: Exploiting Differences in Memory Access Behavior
In a modern chip-multiprocessor system, memory is a shared resource among multiple concurrently executing threads. The memory scheduling algorithm should resolve memory contention...
Yoongu Kim, Michael Papamichael, Onur Mutlu, Mor H...
MICRO
2011
IEEE
407views Hardware» more  MICRO 2011»
13 years 2 months ago
Thread Cluster Memory Scheduling
In a modern chip-multiprocessor system, memory is a shared resource among multiple concurrently executing threads. The memory scheduling algorithm should resolve memory contention...
Yoongu Kim, Michael Papamichael, Onur Mutlu, Mor H...
COMGEO
2006
ACM
13 years 7 months ago
Computing homotopic shortest paths efficiently
Geometric shortest paths are a major topic in computational geometry; see the survey paper by Mitchell [12]. A shortest path between two points in a simple polygon can be found in...
Alon Efrat, Stephen G. Kobourov, Anna Lubiw
ISCA
2005
IEEE
90views Hardware» more  ISCA 2005»
14 years 1 months ago
Optimizing Replication, Communication, and Capacity Allocation in CMPs
Chip multiprocessors (CMPs) substantially increase capacity pressure on the on-chip memory hierarchy while requiring fast access. Neither private nor shared caches can provide bot...
Zeshan Chishti, Michael D. Powell, T. N. Vijaykuma...