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SBACPAD
2007
IEEE
157views Hardware» more  SBACPAD 2007»
14 years 2 months ago
Exploring Novel Parallelization Technologies for 3-D Imaging Applications
Multi-dimensional imaging techniques involve the processing of high resolution images commonly used in medical, civil and remote-sensing applications. A barrier commonly encounter...
Diego Rivera, Dana Schaa, Micha Moffie, David R. K...
GECCO
2008
Springer
131views Optimization» more  GECCO 2008»
13 years 9 months ago
Self-adaptive mutation in XCSF
Recent advances in XCS technology have shown that selfadaptive mutation can be highly useful to speed-up the evolutionary progress in XCS. Moreover, recent publications have shown...
Martin V. Butz, Patrick O. Stalph, Pier Luca Lanzi
IEEEINTERACT
2003
IEEE
14 years 1 months ago
Procedure Cloning and Integration for Converting Parallelism from Coarse to Fine Grain
This paper introduces a method for improving program run-time performance by gathering work in an application and executing it efficiently in an integrated thread. Our methods ext...
Won So, Alexander G. Dean
ISCA
1992
IEEE
151views Hardware» more  ISCA 1992»
13 years 12 months ago
An Elementary Processor Architecture with Simultaneous Instruction Issuing from Multiple Threads
In this paper, we propose a multithreaded processor architecture which improves machine throughput. In our processor architecture, instructions from different threads (not a singl...
Hiroaki Hirata, Kozo Kimura, Satoshi Nagamine, Yos...
FPGA
2008
ACM
129views FPGA» more  FPGA 2008»
13 years 9 months ago
Efficient ASIP design for configurable processors with fine-grained resource sharing
Application-Specific Instruction-set Processors (ASIP) can improve execution speed by using custom instructions. Several ASIP design automation flows have been proposed recently. ...
Quang Dinh, Deming Chen, Martin D. F. Wong