4116 search results - page 13 / 824 » Type Analysis for CHIP |
CC
2010
Springer
14 years 3 months ago
2010
Springer
On Chip Multiprocessors (CMP), it is common that multiple cores share certain levels of cache. The sharing increases the contention in cache and memory-to-chip bandwidth, further h...
SAC
2006
ACM
14 years 2 months ago
2006
ACM
: In chip design, one of the main objectives is to decrease its clock cycle; however, the existing approaches to timing analysis under uncertainty are based on fundamentally restri...
CORR
2007
Springer
13 years 8 months ago
2007
Springer
This paper presents a new dynamic power management architecture of a System on Chip. The Power State Machine describing the status of the core follows the recommendations of the A...
SIGARCH
2008
13 years 8 months ago
2008
This paper presents a parallelization framework for emerging applications on the future chip multiprocessors (CMPs). With the continuing prevalence of CMP and the number of on-die...
ITNG
2007
IEEE
14 years 2 months ago
2007
IEEE
In this paper, we present several enhanced network techniques which are appropriate for VLSI implementation and have reduced complexity, high throughput, and simple routing algori...