Sciweavers

4116 search results - page 22 / 824
» Type Analysis for CHIP
Sort
View
VLSID
2008
IEEE
151views VLSI» more  VLSID 2008»
14 years 9 months ago
Predictable Implementation of Real-Time Applications on Multiprocessor Systems-on-Chip
Worst-case execution time (WCET) analysis and, in general, the predictability of real-time applications implemented on multiprocessor systems has been addressed only in very restri...
Alexandru Andrei, Petru Eles, Zebo Peng, Jakob Ros...
ICCD
2004
IEEE
107views Hardware» more  ICCD 2004»
14 years 5 months ago
Analyzing Power Consumption of Message Passing Primitives in a Single-Chip Multiprocessor
In this work we propose a methodology for the accurate analysis of the power consumption of interprocessor communication in a MPSoC, and the construction of high-level power macro...
Mirko Loghi, Luca Benini, Massimo Poncino
ICFP
1999
ACM
14 years 28 days ago
Type Dispatch for Named Hierarchical Types
Type dispatch constructs are an important feature of many programming languages. Scheme has predicates for testing the runtime type of a value. Java has a class cast expression an...
Neal Glew
ASAP
1996
IEEE
96views Hardware» more  ASAP 1996»
14 years 24 days ago
Kestrel: A Programmable Array for Sequence Analysis
Kestrel is a programmable linear array processor designed for sequence analysis. Among other features, Kestrel includes an 8-bit word, a single-cycle add-and-minimize instruction, ...
Jeffrey D. Hirschberg, Richard Hughey, Kevin Karpl...
PVLDB
2008
121views more  PVLDB 2008»
13 years 8 months ago
Type inference and type checking for queries on execution traces
This paper studies, for the first time, the management of type information for an important class of semi-structured data: nested DAGs (Directed Acyclic Graphs) that describe exec...
Daniel Deutch, Tova Milo