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FDL
2004
IEEE
13 years 11 months ago
Designing for dynamic partially reconfigurable FPGAs with SystemC and OSSS
This paper presents a new approach to design embedded systems based on dynamic partial reconfigurable FPGAs. The approach is intended to allow designing of systems with runtime re...
Andreas Schallenberg, Frank Oppenheimer, Wolfgang ...
TC
2008
13 years 7 months ago
An Efficient and Deadlock-Free Network Reconfiguration Protocol
Component failures and planned component replacements cause changes in the topology and routing paths supplied by the interconnection network of a parallel processor system over ti...
Olav Lysne, José Miguel Montañana, J...
SBCCI
2003
ACM
135views VLSI» more  SBCCI 2003»
14 years 21 days ago
Modeling a Reconfigurable System for Computing the FFT in Place via Rewriting-Logic
The growing adoption of reconfigurable architectures opens new implementation alternatives and creates new design challenges. In the case of dynamically reconfigurable architectur...
Mauricio Ayala-Rincón, Rodrigo B. Nogueira,...
ARCS
2005
Springer
14 years 1 months ago
An FPGA Dynamically Reconfigurable Framework for Modular Robotics
Dynamic Reconfiguration has always constituted a challenge for embedded systems designers. Nowadays, technological developments make possible to do it on Xilinx FPGAs, but setting...
Andres Upegui, Rico Moeckel, Elmar Dittrich, Auke ...
ARC
2006
Springer
201views Hardware» more  ARC 2006»
13 years 11 months ago
Dynamic Partial Reconfigurable FIR Filter Design
Abstract. This paper presents a novel partially reconfigurable FIR filter design that employs dynamic partial reconfiguration. Our scope is to implement a low-power, area-efficient...
Yeong-Jae Oh, Hanho Lee, Chong Ho Lee