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ATS
2001
IEEE
126views Hardware» more  ATS 2001»
13 years 11 months ago
Design of an Optimal Test Access Architecture Using a Genetic Algorithm
Test access is a major problem for core-based systemon-chip (SOC) designs. Since cores in an SOC are not directly accessible via chip inputs and outputs, special access mechanisms...
Zahra Sadat Ebadi, André Ivanov
ISSS
1996
IEEE
114views Hardware» more  ISSS 1996»
13 years 11 months ago
Flow Graph Balancing for Minimizing the Required Memory Bandwidth
In this paper we present the problem of flow graph balancing for minimizingthe required memory bandwidth. Our goal is to minimize the required memory bandwidth within the given cy...
Sven Wuytack, Francky Catthoor, Gjalt G. de Jong, ...
IDMS
2001
Springer
133views Multimedia» more  IDMS 2001»
13 years 11 months ago
An Access Control Architecture for Metropolitan Area Wireless Networks
This paper introduces a novel access control architecture for publicly accessible, wireless networks. The architecture was designed to address the requirements obtained from a case...
Stefan Schmid, Joe Finney, Maomao Wu, Adrian Frida...
TMC
2010
89views more  TMC 2010»
13 years 5 months ago
SIP-Based IMS Signaling Analysis for WiMax-3G Interworking Architectures
—The third-generation partnership project (3GPP) and 3GPP2 have standardized the IP multimedia subsystem (IMS) to provide ubiquitous and access network-independent IP-based servi...
Arslan Munir, Ann Gordon-Ross
ESTIMEDIA
2004
Springer
14 years 23 days ago
Data assignment and access scheduling exploration for multi-layer memory architectures
Abstract— This paper presents an exploration framework which performs data assignment and access scheduling exploration for applications given a multilayer memory architecture. O...
Radoslaw Szymanek, Francky Catthoor, Krzysztof Kuc...