Test access is a major problem for core-based systemon-chip (SOC) designs. Since cores in an SOC are not directly accessible via chip inputs and outputs, special access mechanisms...
In this paper we present the problem of flow graph balancing for minimizingthe required memory bandwidth. Our goal is to minimize the required memory bandwidth within the given cy...
Sven Wuytack, Francky Catthoor, Gjalt G. de Jong, ...
This paper introduces a novel access control architecture for publicly accessible, wireless networks. The architecture was designed to address the requirements obtained from a case...
Stefan Schmid, Joe Finney, Maomao Wu, Adrian Frida...
—The third-generation partnership project (3GPP) and 3GPP2 have standardized the IP multimedia subsystem (IMS) to provide ubiquitous and access network-independent IP-based servi...
Abstract— This paper presents an exploration framework which performs data assignment and access scheduling exploration for applications given a multilayer memory architecture. O...
Radoslaw Szymanek, Francky Catthoor, Krzysztof Kuc...