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» Ultra low power digital signal processing
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ESSCIRC
2011
93views more  ESSCIRC 2011»
12 years 8 months ago
12% Power reduction by within-functional-block fine-grained adaptive dual supply voltage control in logic circuits with 42 volta
— Within-functional-block fine-grained adaptive dual supply voltage control (FADVC) is proposed to reduce the power of CMOS logic circuits. Both process and design variations wi...
Atsushi Muramatsu, Tadashi Yasufuku, Masahiro Nomu...
VEE
2006
ACM
150views Virtualization» more  VEE 2006»
14 years 3 months ago
Evaluating fragment construction policies for SDT systems
Software Dynamic Translation (SDT) systems have been used for program instrumentation, dynamic optimization, security policy enforcement, intrusion detection, and many other uses....
Jason Hiser, Daniel Williams, Adrian Filipi, Jack ...
SECON
2007
IEEE
14 years 3 months ago
Facilitating an Active Transmit-only RFID System Through Receiver-based Processing
— Many asset tracking applications demand long-lived, low-cost, and continuous monitoring of a large number of items, which has posed a significant challenge to today’s RFID d...
Yu Zhang, Gautam D. Bhanage, Wade Trappe, Yanyong ...
DATE
2010
IEEE
171views Hardware» more  DATE 2010»
14 years 2 months ago
Digital statistical analysis using VHDL
—Variations of process parameters have an important impact on reliability and yield in deep sub micron IC technologies. One methodology to estimate the influence of these effects...
Manfred Dietrich, Uwe Eichler, Joachim Haase
ICASSP
2010
IEEE
13 years 9 months ago
Multiantenna spectrum sensing: Detection of spatial correlation among time-series with unknown spectra
One of the key problems in cognitive radio (CR) is the detection of primary activity in order to determine which parts of the spectrum are available for opportunistic access. This...
David Ramírez, Javier Vía, Ignacio S...