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» Ultra-low power digital subthreshold logic circuits
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PARLE
1987
14 years 10 days ago
Emulating Digital Logic using Transputer Networks (very High Parallelism = Simplicity = Performance)
Modern VLSI technology has changed the economic rules by which the balance between processing power, memory and communications is decided in computing systems. This will have a pr...
Peter H. Welch
CEC
2008
IEEE
14 years 3 months ago
Fitness functions for the unconstrained evolution of digital circuits
— This work is part of a project that aims to develop and operate integrated evolvable hardware systems using unconstrained evolution. Experiments are carried out on an evolvable...
Tüze Kuyucu, Martin Trefzer, Andrew J. Greens...
MJ
2007
119views more  MJ 2007»
13 years 8 months ago
Automated energy calculation and estimation for delay-insensitive digital circuits
With increasingly smaller feature sizes and higher on-chip densities, the power dissipation of VLSI systems has become a primary concern for designers. This paper first describes...
Venkat Satagopan, Bonita Bhaskaran, Anshul Singh, ...
FPGA
2004
ACM
136views FPGA» more  FPGA 2004»
14 years 2 months ago
Active leakage power optimization for FPGAs
We consider active leakage power dissipation in FPGAs and present a “no cost” approach for active leakage reduction. It is well-known that the leakage power consumed by a digi...
Jason Helge Anderson, Farid N. Najm, Tim Tuan
CORR
2010
Springer
158views Education» more  CORR 2010»
13 years 3 months ago
Efficient Approaches for Designing Fault Tolerant Reversible Carry Look-Ahead and Carry-Skip Adders
Combinational or Classical logic circuits dissipate heat for every bit of information that is lost. Information is lost when the input vector cannot be recovered from its correspon...
Md. Saiful Islam 0003, Muhammad Mahbubur Rahman, Z...