1872 search results - page 184 / 375 » Unbalanced Cache Systems |
PPSC
1997
13 years 11 months ago
1997
Sparse matrix-vector multiplication is an important kernel that often runs inefficiently on superscalar RISC processors. This paper describes techniques that increase instruction-...
USS
2010
13 years 8 months ago
2010
Idle port scanning uses side-channel attacks to bounce scans off of a "zombie" host to stealthily scan a victim IP address and determine if a port is open or closed, or ...
CODES
2007
IEEE
14 years 4 months ago
2007
IEEE
Performance analysis of microprocessors is a critical step in defining the microarchitecture, prior to register-transfer-level (RTL) design. In complex chip multiprocessor systems...
LCTRTS
2000
Springer
14 years 2 months ago
2000
Springer
The control system of many complex mechatronic products requires for each task the Worst Case Execution Time (WCET), which is needed for the scheduler's admission tests and su...
ICPP
2006
IEEE
14 years 4 months ago
2006
IEEE
— This paper focuses on the transfer of large data in SMP systems. Achieving good performance for intranode communication is critical for developing an efficient communication s...