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CAL
2010
13 years 7 months ago
A Case for Alternative Nested Paging Models for Virtualized Systems
Address translation often emerges as a critical performance bottleneck for virtualized systems and has recently been the impetus for hardware paging mechanisms. These mechanisms ap...
Giang Hoang, Chang Bae, Jack Lange, Lide Zhang, Pe...
ASPLOS
2011
ACM
13 years 1 months ago
Hardware acceleration of transactional memory on commodity systems
The adoption of transactional memory is hindered by the high overhead of software transactional memory and the intrusive design changes required by previously proposed TM hardware...
Jared Casper, Tayo Oguntebi, Sungpack Hong, Nathan...
SIGCOMM
2009
ACM
14 years 4 months ago
Optimizing the BSD routing system for parallel processing
The routing architecture of the original 4.4BSD [3] kernel has been deployed successfully without major design modification for over 15 years. In the unified routing architectur...
Qing Li, Kip Macy
FCCM
2006
IEEE
113views VLSI» more  FCCM 2006»
14 years 4 months ago
GraphStep: A System Architecture for Sparse-Graph Algorithms
— Many important applications are organized around long-lived, irregular sparse graphs (e.g., data and knowledge bases, CAD optimization, numerical problems, simulations). The gr...
Michael DeLorimier, Nachiket Kapre, Nikil Mehta, D...
MM
2000
ACM
91views Multimedia» more  MM 2000»
14 years 2 months ago
A prediction system for multimedia pre-fetching in Internet
The rapid development of Internet has resulted in more and more multimedia in Web content. However, due to the limitation in the bandwidth and huge size of the multimedia data, us...
Zhong Su, Qiang Yang, HongJiang Zhang