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» Uncertainty Reduction Using Dynamics
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ANCS
2007
ACM
15 years 6 months ago
Design of adaptive communication channel buffers for low-power area-efficient network-on-chip architecture
Network-on-Chip (NoC) architectures provide a scalable solution to the wire delay constraints in deep submicron VLSI designs. Recent research into the optimization of NoC architec...
Avinash Karanth Kodi, Ashwini Sarathy, Ahmed Louri
ERSA
2006
113views Hardware» more  ERSA 2006»
15 years 3 months ago
Efficient FPGA-based Implementations of the MIMO-OFDM Physical Layer
- In this paper, we present a prototype FPGA design for an efficient physical layer implementation of a MIMO-OFDM technique. We propose a pipelined architecture using a Fast Fourie...
Jeoong Sung Park, Hong-Jip Jung, Viktor K. Prasann...
ESANN
2003
15 years 3 months ago
RetinotopicNET: An Efficient Simulator for Retinotopic Visual Architectures
: -RetinotopicNET is an efficient simulator for neural networks with retinotopic-like receptive fields. The system has two main characteristics: it is event-driven and it takes adv...
Raul Cristian Muresan
NIPS
2001
15 years 3 months ago
Learning Lateral Interactions for Feature Binding and Sensory Segmentation
We present a new approach to the supervised learning of lateral interactions for the competitive layer model (CLM) dynamic feature binding architecture. The method is based on con...
Heiko Wersing
IJCAI
2003
15 years 3 months ago
Active Probing Strategies for Problem Diagnosis in Distributed Systems
We address the task of problem determination in a distributed system using probes, or test transactions, which gather information about system components. Effective probing requir...
Mark Brodie, Irina Rish, Sheng Ma, Natalia Odintso...