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» Understanding POWER multiprocessors
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ICIP
1999
IEEE
14 years 9 months ago
Architecture of Embedded Video Processing in a Multimedia Chip-Set
A new chip-set for video display processing in a consumer television or set-top box is presented. Key aspect of the chip-set is a high flexibility and programmability of multi-win...
Egbert G. T. Jaspers, Peter H. N. de With
AHS
2006
IEEE
152views Hardware» more  AHS 2006»
14 years 1 months ago
Architecture of a Dynamically Reconfigurable NoC for Adaptive Reconfigurable MPSoC
This paper describes the architecture of our dynamically reconfigurable Network-on-Chip (NoC) architecture that has been proposed for reconfigurable Multiprocessor system-on-chip ...
Balal Ahmad, Ahmet T. Erdogan, Sami Khawam
ASAP
2000
IEEE
184views Hardware» more  ASAP 2000»
14 years 4 days ago
Tradeoff Analysis and Architecture Design of a Hybrid Hardware/Software Sorter
Sorting long sequences of keys is a problem that occurs in many different applications. For embedded systems, a uniprocessor software solution is often not applicable due to the l...
Marcus Bednara, Oliver Beyer, Jürgen Teich, R...
HICSS
1994
IEEE
139views Biometrics» more  HICSS 1994»
13 years 12 months ago
Operating System Support for Shared Memory Clusters
This paper addresses a purely software-based solution to the multiprocessor cache coherence problem by structuring an operating system to provide for the coherence of its own data...
Ronald L. Rockhold, James L. Peterson
IJES
2007
92views more  IJES 2007»
13 years 7 months ago
Exploring temperature-aware design in low-power MPSoCs
: The power density in high performance systems continues to rise with every process technology generation, thereby increasing the operating temperature and creating ‘hot spotsâ€...
Giacomo Paci, Francesco Poletti, Luca Benini, Paul...