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» Understanding POWER multiprocessors
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ICS
2009
Tsinghua U.
14 years 2 months ago
A comprehensive power-performance model for NoCs with multi-flit channel buffers
Large Multi-Processor Systems-on-Chip use Networks-on-Chip with a high degree of reusability and scalability for message communication. Therefore, network infrastructure is a cruc...
Mohammad Arjomand, Hamid Sarbazi-Azad
CODES
2007
IEEE
14 years 4 months ago
Performance modeling for early analysis of multi-core systems
Performance analysis of microprocessors is a critical step in defining the microarchitecture, prior to register-transfer-level (RTL) design. In complex chip multiprocessor systems...
Reinaldo A. Bergamaschi, Indira Nair, Gero Dittman...
OSDI
2008
ACM
14 years 10 months ago
A Comparison of High-Level Full-System Power Models
Dynamic power management in enterprise environments requires an understanding of the relationship between resource utilization and system-level power consumption. Power models bas...
Suzanne Rivoire, Parthasarathy Ranganathan, Christ...
PACS
2000
Springer
83views Hardware» more  PACS 2000»
14 years 1 months ago
A Comparison of Two Architectural Power Models
Reducing power, on both a per cycle basis and as the total energy used over the lifetime of an application, has become more important as small and embedded devices become increasi...
Soraya Ghiasi, Dirk Grunwald
IPPS
2007
IEEE
14 years 4 months ago
Power-Aware Speedup
Power-aware processors operate in various power modes to reduce energy consumption with a corresponding decrease in peak processor throughput. Recent work has shown power-aware cl...
Rong Ge, Kirk W. Cameron