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TC
2011
13 years 2 months ago
Maximizing Spare Utilization by Virtually Reorganizing Faulty Cache Lines
—Aggressive technology scaling to 45nm and below introduces serious reliability challenges to the design of microprocessors. Since a large fraction of chip area is devoted to on-...
Amin Ansari, Shantanu Gupta, Shuguang Feng, Scott ...
WSC
1997
13 years 8 months ago
Forecasting Investment Opportunities Through Dynamic Simulation
Outcomes of this modeling research are the ability to facilitate comparisons of investment alternatives or strategies; regarding primary targets, possible annual revenues, promoti...
Stephen R. Parker
INFOCOM
2012
IEEE
11 years 10 months ago
NSDMiner: Automated discovery of Network Service Dependencies
—Enterprise networks today host a wide variety of network services, which often depend on each other to provide and support network-based services and applications. Understanding...
Arun Natarajan, Peng Ning, Yao Liu, Sushil Jajodia...
HCI
2007
13 years 9 months ago
Online Analysis of Hierarchical Events in Meetings
Automatic online analysis of meetings is very important from three points of view: serving as an important archive of a meeting, understanding human interaction processes, and prov...
Xiang Zhang, Guangyou Xu, Xiaoling Xiao, Linmi Tao
MICRO
2009
IEEE
124views Hardware» more  MICRO 2009»
14 years 2 months ago
ZerehCache: armoring cache architectures in high defect density technologies
Aggressive technology scaling to 45nm and below introduces serious reliability challenges to the design of microprocessors. Large SRAM structures used for caches are particularly ...
Amin Ansari, Shantanu Gupta, Shuguang Feng, Scott ...