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SIGMETRICS
1992
ACM
128views Hardware» more  SIGMETRICS 1992»
15 years 8 months ago
MemSpy: Analyzing Memory System Bottlenecks in Programs
To cope with the increasing difference between processor and main memory speeds, modern computer systems use deep memory hierarchies. In the presence of such hierarchies, the perf...
Margaret Martonosi, Anoop Gupta, Thomas E. Anderso...
IPPS
1999
IEEE
15 years 8 months ago
A Graph Based Framework to Detect Optimal Memory Layouts for Improving Data Locality
In order to extract high levels of performance from modern parallel architectures, the effective management of deep memory hierarchies is very important. While architectural advan...
Mahmut T. Kandemir, Alok N. Choudhary, J. Ramanuja...
FOCS
2008
IEEE
15 years 11 months ago
Linear Level Lasserre Lower Bounds for Certain k-CSPs
We show that for k ≥ 3 even the Ω(n) level of the Lasserre hierarchy cannot disprove a random k-CSP instance over any predicate type implied by k-XOR constraints, for example ...
Grant Schoenebeck
CODES
2002
IEEE
15 years 9 months ago
Hardware support for real-time embedded multiprocessor system-on-a-chip memory management
The aggressive evolution of the semiconductor industry — smaller process geometries, higher densities, and greater chip complexity — has provided design engineers the means to...
Mohamed Shalan, Vincent John Mooney III
ISSS
2000
IEEE
111views Hardware» more  ISSS 2000»
15 years 8 months ago
Systematic Data Reuse Exploration Methodology for Irregular Access Patterns
Efficient use of an optimized custom memory hierarchy to exploit temporal locality in the memory accesses on array signals can have a very large impact on the power consumption i...
Tanja Van Achteren, Rudy Lauwereins, Francky Catth...