720 search results - page 82 / 144 » Uniform Memory Hierarchies |
122
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IISWC
2009
IEEE
15 years 11 months ago
2009
IEEE
PARSEC is a reference application suite used in industry and academia to assess new Chip Multiprocessor (CMP) designs. No investigation to date has profiled PARSEC on real hardwa...
120
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HPCC
2007
Springer
15 years 10 months ago
2007
Springer
This paper presents a new algorithm for computing the singular value decomposition (SVD) on multilevel memory hierarchy architectures. This algorithm is based on one-sided JRS iter...
135
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PRDC
2006
IEEE
15 years 10 months ago
2006
IEEE
As SRAM devices are scaled down, the number of variation-induced defective memory cells increases rapidly. Combination of ECC, particularly SECDED, with a redundancy technique can...
142
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CASES
2004
ACM
15 years 10 months ago
2004
ACM
ScratchPad Memories (SPMs) are commonly used in embedded systems because they are more energy-efficient than caches and enable tighter application control on the memory hierarchy...
153
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PDP
2010
IEEE
15 years 8 months ago
2010
IEEE
The increasing numbers of cores, shared caches and memory nodes within machines introduces a complex hardware topology. High-performance computing applications now have to carefull...