54 search results - page 7 / 11 » Update-Based Cache Coherence Protocols for Scalable Shared-M... |
SPDP
1992
IEEE
14 years 14 days ago
1992
IEEE
ASPLOS
1991
ACM
13 years 12 months ago
1991
ACM
Caches enhance the performance of multiprocessors by reducing network trac and average memory access latency. However, cache-based systems must address the problem of cache coher...
DSD
2008
IEEE
13 years 10 months ago
2008
IEEE
Due to modern technology trends such as decreasing feature sizes and lower voltage levels, fault tolerance is becoming increasingly important in computing systems. Shared memory i...
IEEEPACT
2005
IEEE
14 years 2 months ago
2005
IEEE
Transactional Coherence and Consistency (TCC) is a novel coherence scheme for shared memory multiprocessors that uses programmer-defined transactions as the fundamental unit of p...
DSN
2011
IEEE
12 years 8 months ago
2011
IEEE
—Aggressive technology scaling causes chip multiprocessors increasingly error-prone. Core-level faulttolerant approaches bind two cores to implement redundant execution and error...