Resource management on accelerator based systems is complicated by the disjoint nature of the main CPU and accelerator, which involves separate memory hierarhcies, different degr...
Filip Blagojevic, Costin Iancu, Katherine A. Yelic...
In this paper, we describe an algorithm and implementation of locality optimizations for architectures with instruction sets such as Intel’s SSE and Motorola’s AltiVec that su...
Hiding communication latency is an important optimization for parallel programs. Programmers or compilers achieve this by using non-blocking communication primitives and overlappi...
For a number of years, dataflow concepts have provided designers of digital signal processing systems with environments capable of expressing high-level software architectures as ...
William Plishker, Nimish Sane, Shuvra S. Bhattacha...
—Traditional operating systems differentiate between threads, which are managed by the kernel scheduler, and interrupt handlers, which are scheduled by the hardware. This approac...
Wanja Hofer, Daniel Lohmann, Fabian Scheler, Wolfg...