122 search results - page 19 / 25 » User-controllable coherence for high performance shared memo... |
JSA
2008
13 years 6 months ago
2008
Conventional snoopy-based chip multiprocessors take an aggressive approach broadcasting snoop requests to all nodes. In addition each node checks all received requests. This appro...
EMSOFT
2005
Springer
14 years 7 days ago
2005
Springer
Recent research in embedded computing indicates that packing multiple processor cores on the same die is an effective way of utilizing the ever-increasing number of transistors. T...
FTCS
1998
13 years 8 months ago
1998
The trend in implementing today's embedded applications is toward the use of commercial-off-the-shelf open architecture. Reducing costs and facilitating systems integration a...
PODC
2010
ACM
13 years 10 months ago
2010
ACM
We study Reader-Writer Exclusion [1], a well-known variant of the Mutual Exclusion problem [2] where processes are divided into two classes–readers and writers–and multiple re...
IPPS
2006
IEEE
14 years 22 days ago
2006
IEEE
Step caches are caches in which data entered to an cache array is kept valid only until the end of ongoing step of execution. Together with an advanced pipelined multithreaded arc...