1895 search results - page 19 / 379 » Using ATL for Checking Models |
DAC
2003
ACM
14 years 8 months ago
2003
ACM
We present an algorithm that checks behavioral consistency between an ANSI-C program and a circuit given in Verilog using Bounded Model Checking. Both the circuit and the program ...
ATVA
2004
Springer
13 years 11 months ago
2004
Springer
In this paper, we describe a first-order linear time temporal logic (LTL) model checker based on multiway decision graphs (MDG). We developed a first-order temporal language, LMDG ...
HASE
1999
IEEE
13 years 11 months ago
1999
IEEE
Statechart Diagrams provide a graphical notation for describing dynamic aspects of system behaviour within the Unified Modeling Language (UML). In this paper we present a branchin...
GLVLSI
2006
IEEE
14 years 1 months ago
2006
IEEE
Functional verification is one of the major bottlenecks in microprocessor design. Simulation-based techniques are the most widely used form of processor verification. Efficient ...
SPIN
2004
Springer
14 years 22 days ago
2004
Springer
The notion that certain procedures are atomic provides a valuable partial specification for many multithreaded software systems. Several existing tools verify atomicity by showing...